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HPCA
2007
IEEE
14 years 8 months ago
Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-thread Applications
Chip multiprocessors with multiple simpler cores are gaining popularity because they have the potential to drive future performance gains without exacerbating the problems of powe...
Hongtao Zhong, Steven A. Lieberman, Scott A. Mahlk...
HPCA
2005
IEEE
14 years 8 months ago
Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
Aamer Jaleel, Bruce L. Jacob
HPCA
2004
IEEE
14 years 8 months ago
Out-of-Order Commit Processors
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...
Adrián Cristal, Daniel Ortega, Josep Llosa,...
CHI
2003
ACM
14 years 8 months ago
A context-aware experience sampling tool
A new software tool for user-interface development and assessment of ubiquitous computing applications is available for CHI researchers. The software permits researchers to use co...
Stephen S. Intille, John Rondoni, Chuck Kukla, Isa...
RECOMB
2005
Springer
14 years 8 months ago
Learning Interpretable SVMs for Biological Sequence Classification
Background: Support Vector Machines (SVMs) ? using a variety of string kernels ? have been successfully applied to biological sequence classification problems. While SVMs achieve ...
Christin Schäfer, Gunnar Rätsch, Sö...