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» Precise RSSI with High Process Variation Tolerance
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DATE
2003
IEEE
103views Hardware» more  DATE 2003»
14 years 24 days ago
Reduced Delay Uncertainty in High Performance Clock Distribution Networks
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
Dimitrios Velenis, Marios C. Papaefthymiou, Eby G....
ICCAD
2006
IEEE
124views Hardware» more  ICCAD 2006»
14 years 4 months ago
Combinatorial algorithms for fast clock mesh optimization
We present a fast and efficient combinatorial algorithm to simultaneously identify the candidate locations as well as the sizes of the buffers driving a clock mesh. Due to the hi...
Ganesh Venkataraman, Zhuo Feng, Jiang Hu, Peng Li
ICIP
2010
IEEE
13 years 5 months ago
Transform-domain temporal prediction in video coding: Exploiting correlation variation across coefficients
Temporal prediction in standard video coding is performed in the spatial domain, where each pixel is predicted from a motioncompensated reconstructed pixel in a prior frame. This ...
Jingning Han, Vinay Melkote, Kenneth Rose
CORR
2010
Springer
120views Education» more  CORR 2010»
13 years 7 months ago
Modeling of 2D and 3D Assemblies Taking Into Account Form Errors of Plane Surfaces
The tolerancing process links the virtual and the real worlds. From the former, tolerances define a variational geometrical language (geometric parameters). From the latter, there...
Serge Samper, Pierre-Antoine Adragna, Hugues Favre...
MICRO
2009
IEEE
160views Hardware» more  MICRO 2009»
14 years 2 months ago
Variation-tolerant non-uniform 3D cache management in die stacked multicore processor
Process variations in integrated circuits have significant impact on their performance, leakage and stability. This is particularly evident in large, regular and dense structures...
Bo Zhao, Yu Du, Youtao Zhang, Jun Yang 0002