47 search results - page 5 / 10 » Precomputation-based Guarding for Dynamic and Leakage Power ... |
CASES
2004
ACM
14 years 16 days ago
2004
ACM
While the dynamic voltage scaling (DVS) techniques are efficient in reducing the dynamic energy consumption for the processor, varying voltage alone becomes less effective for t...
Publication
With the technology moving into the deep sub-100nm region, the increase of leakage power consumption necessitates more aggressive power reduction techniques. Power gating is a prom...
ISQED
2006
IEEE
14 years 1 months ago
2006
IEEE
- A low overhead circuit technique is proposed in this paper for simultaneously reducing subthreshold and gate oxide leakage currents in domino logic circuits. PMOS sleep transisto...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
Abstract— Dynamic voltage scaling (DVS) is a powerful technique for reducing dynamic power consumption in a computing system. However, as technology feature size continues to sca...
ISLPED
2005
ACM
14 years 20 days ago
2005
ACM
Leakage power reduction in cache memories continues to be a critical area of research because of the promise of a significant pay-off. Various techniques have been developed so fa...