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» Predictable performance in SMT processors
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ICPP
1999
IEEE
13 years 12 months ago
SLC: Symbolic Scheduling for Executing Parameterized Task Graphs on Multiprocessors
Task graph scheduling has been found effective in performance prediction and optimization of parallel applications. A number of static scheduling algorithms have been proposed for...
Michel Cosnard, Emmanuel Jeannot, Tao Yang
ISCA
1999
IEEE
98views Hardware» more  ISCA 1999»
13 years 12 months ago
Multicast Snooping: A New Coherence Method Using a Multicast Address Network
This paper proposes a new coherence method called "multicast snooping" that dynamically adapts between broadcast snooping and a directory protocol. Multicast snooping is...
E. Ender Bilir, Ross M. Dickson, Ying Hu, Manoj Pl...
ISCA
2005
IEEE
105views Hardware» more  ISCA 2005»
14 years 1 months ago
Exploiting Structural Duplication for Lifetime Reliability Enhancement
Increased power densities (and resultant temperatures) and other effects of device scaling are predicted to cause significant lifetime reliability problems in the near future. In...
Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, J...
ISCA
2000
IEEE
92views Hardware» more  ISCA 2000»
13 years 12 months ago
Trace preconstruction
Trace caches enable high bandwidth, low latency instruction supply, but have a high miss penalty and relatively large working sets. Consequently, their performance may suffer due ...
Quinn Jacobson, James E. Smith
ISCA
2008
IEEE
92views Hardware» more  ISCA 2008»
14 years 2 months ago
Counting Dependence Predictors
Modern processors rely on memory dependence prediction to execute load instructions as early as possible, speculating that they are not dependent on an earlier, unissued store. To...
Franziska Roesner, Doug Burger, Stephen W. Keckler