201 search results - page 9 / 41 » Predicting locality phases for dynamic memory optimization |
EUC
2006
Springer
14 years 2 months ago
2006
Springer
As the ever-increasing gap between the speed of processor and the speed of memory has become the cause of one of primary bottlenecks of computer systems, modern architecture system...
GLOBECOM
2010
IEEE
13 years 8 months ago
2010
IEEE
Abstract--Regular expression (Regex) becomes the standard signature language for security and application detection. Deterministic finite automata (DFAs) are widely used to perform...
DATE
2010
IEEE
14 years 4 months ago
2010
IEEE
Abstract— The optimal size of a large on-chip cache can be different for different programs: at some point, the reduction of cache misses achieved when increasing cache size hits...
CODES
2005
IEEE
14 years 4 months ago
2005
IEEE
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
SC
2000
ACM
14 years 2 months ago
2000
ACM
This paper proposes a hardware mechanism for reducing coherency overhead occurring in scientific computations within DSM systems. A first phase aims at detecting, in the address s...