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MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
15 years 2 days ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
129
Voted
ISCA
2008
IEEE
137views Hardware» more  ISCA 2008»
15 years 8 months ago
Self-Optimizing Memory Controllers: A Reinforcement Learning Approach
Efficiently utilizing off-chip DRAM bandwidth is a critical issue in designing cost-effective, high-performance chip multiprocessors (CMPs). Conventional memory controllers deli...
Engin Ipek, Onur Mutlu, José F. Martí...
CASES
2004
ACM
15 years 5 months ago
Reducing energy consumption of queries in memory-resident database systems
The tremendous growth of system memories has increased the capacities and capabilities of memory-resident embedded databases, yet current embedded databases need to be tuned in or...
Jayaprakash Pisharath, Alok N. Choudhary, Mahmut T...
234
Voted
SIGMETRICS
2012
ACM
347views Hardware» more  SIGMETRICS 2012»
13 years 4 months ago
Temperature management in data centers: why some (might) like it hot
The energy consumed by data centers is starting to make up a significant fraction of the world’s energy consumption and carbon emissions. A large fraction of the consumed energ...
Nosayba El-Sayed, Ioan A. Stefanovici, George Amvr...
128
Voted
HPCA
2005
IEEE
16 years 2 months ago
Tapping ZettaRAMTM for Low-Power Memory Systems
ZettaRAMTM is a new memory technology under development by ZettaCoreTM as a potential replacement for conventional DRAM. The key innovation is replacing the conventional capacitor...
Ravi K. Venkatesan, Ahmed S. Al-Zawawi, Eric Roten...