468 search results - page 44 / 94 » Process Migration Effects on Memory Performance of Multiproc... |
NDSS
2005
IEEE
14 years 1 months ago
2005
IEEE
We present a solution to the denial of service (DoS) problem that does not rely on network infrastructure support, conforming to the end-to-end (e2e) design principle. Our approac...
MICRO
2007
IEEE
14 years 1 months ago
2007
IEEE
Process variations will greatly impact the stability, leakage power consumption, and performance of future microprocessors. These variations are especially detrimental to 6T SRAM ...
HPCA
2000
IEEE
14 years 2 days ago
2000
IEEE
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
IPPS
1999
IEEE
13 years 12 months ago
1999
IEEE
In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...
DSD
2010
IEEE
13 years 6 months ago
2010
IEEE
— Chip Multiprocessor (CMP) systems have become the reference architecture for designing micro-processors, thanks to the improvements in semiconductor nanotechnology that have co...