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» Process Variations and their Impact on Circuit Operation
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DATE
2003
IEEE
116views Hardware» more  DATE 2003»
14 years 19 days ago
Statistical Timing Analysis Using Bounds
The growing impact of within-die process variation has created the need for statistical timing analysis, where gate delays are modeled as random variables. Statistical timing anal...
Aseem Agarwal, David Blaauw, Vladimir Zolotov, Sar...
CEC
2005
IEEE
14 years 29 days ago
Designing comminution circuits with a multi-objective evolutionary algorithm
Mining is an important industry in Australia, contributing billions of dollars to the economy. The performance of a processing plant has a large impact on the profitability of a m...
Simon Huband, Luigi Barone, Philip Hingston, R. Ly...
CCR
2004
95views more  CCR 2004»
13 years 7 months ago
A Per-Domain Behavior for circuit emulation in IP networks
Circuit networks are expensive to build, difficult to operate, fragile, and not easily scalable. Many network operators would like to carry circuit traffic as an overlay on top of...
Kathleen M. Nichols, Van Jacobson, Kedarnath Podur...
DAC
2005
ACM
14 years 8 months ago
Correlation-preserved non-gaussian statistical timing analysis with quadratic timing model
Recent study shows that the existing first order canonical timing model is not sufficient to represent the dependency of the gate delay on the variation sources when processing an...
Lizheng Zhang, Weijen Chen, Yuhen Hu, John A. Gubn...
VTS
2008
IEEE
119views Hardware» more  VTS 2008»
14 years 1 months ago
Error Sequence Analysis
With increasing IC process variation and increased operating speed, it is more likely that even subtle defects will lead to the malfunctioning of a circuit. Various fault models, ...
Jaekwang Lee, Intaik Park, Edward J. McCluskey