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» Process Variations and their Impact on Circuit Operation
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DAC
2005
ACM
13 years 9 months ago
Parameterized block-based statistical timing analysis with non-gaussian parameters, nonlinear delay functions
Variability of process parameters makes prediction of digital circuit timing characteristics an important and challenging problem in modern chip design. Recently, statistical stat...
Hongliang Chang, Vladimir Zolotov, Sambasivan Nara...
DATE
2010
IEEE
171views Hardware» more  DATE 2010»
14 years 13 days ago
Digital statistical analysis using VHDL
—Variations of process parameters have an important impact on reliability and yield in deep sub micron IC technologies. One methodology to estimate the influence of these effects...
Manfred Dietrich, Uwe Eichler, Joachim Haase
DATE
2008
IEEE
114views Hardware» more  DATE 2008»
14 years 1 months ago
A Single-supply True Voltage Level Shifter
When a signal traverses on-chip voltage domains, a level shifter is required. Inverters can handle a high to low voltage shift with minimal leakage. For a low to high voltage leve...
Rajesh Garg, Gagandeep Mallarapu, Sunil P. Khatri
DAC
2003
ACM
14 years 18 days ago
Crosstalk noise in FPGAs
In recent years, due to rapid advances in VLSI manufacturing technology capable of packing more and more devices and wires on a chip, crosstalk has emerged as a serious problem af...
Yajun Ran, Malgorzata Marek-Sadowska
ASPDAC
2010
ACM
637views Hardware» more  ASPDAC 2010»
13 years 5 months ago
A new graph-theoretic, multi-objective layout decomposition framework for double patterning lithography
As Double Patterning Lithography(DPL) becomes the leading candidate for sub-30nm lithography process, we need a fast and lithography friendly decomposition framework. In this pape...
Jae-Seok Yang, Katrina Lu, Minsik Cho, Kun Yuan, D...