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» Processing-in-Memory: Exploring the Design Space
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PERCOM
2006
ACM
16 years 3 months ago
Analysing fundamental properties of marker-based vision system designs
This paper investigates fundamental properties of Marker-based Vision (MBV) systems. We present a theoretical analysis of the performance of basic tag designs which is extended th...
Andrew C. Rice, Robert K. Harle, Alastair R. Beres...
ARITH
2009
IEEE
15 years 10 months ago
Unified Approach to the Design of Modulo-(2n +/- 1) Adders Based on Signed-LSB Representation of Residues
Moduli of the form 2n ± 1, which greatly simplify certain arithmetic operations in residue number systems (RNS), have been of longstanding interest. A steady stream of designs fo...
Ghassem Jaberipur, Behrooz Parhami
FPGA
2005
ACM
156views FPGA» more  FPGA 2005»
15 years 9 months ago
Design of programmable interconnect for sublithographic programmable logic arrays
Sublithographic Programmable Logic Arrays can be interconnected and restored using nanoscale wires. Building on a hybrid of bottom-up assembly techniques supported by conventional...
André DeHon
DATE
2003
IEEE
132views Hardware» more  DATE 2003»
15 years 9 months ago
Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
Youngchul Cho, Ganghee Lee, Sungjoo Yoo, Kiyoung C...
CODES
2005
IEEE
15 years 9 months ago
An architectural level design methodology for embedded face detection
Face detection and recognition research has attracted great attention in recent years. Automatic face detection has great potential in a large array of application areas, includin...
Vida Kianzad, Sankalita Saha, Jason Schlessman, Ga...