Future systems will have to support multiple and concurrent dynamic compute-intensive applications, while respecting real-time and energy consumption constraints. With the increase...
Nicolas Ventroux, Alexandre Guerre, Tanguy Sassola...
Clustered L0 buffers are an interesting alternative to reduce energy consumption in the instruction memory hierarchy of embedded VLIW processors. Currently, the synthesis of L0 cl...
Murali Jayapala, Tom Vander Aa, Francisco Barat, G...
One of the efficient design methodologies for large scale System on a Chip (SoC) is IP-based design. In this methodology, a system is considered as a set of components and intercon...
Shigeru Watanabe, Kenshu Seto, Y. Ishikawa, Satosh...
We present a methodology and algorithms for automatic refinement from a given design specification to an architecture model based on decisions in architecture exploration. An arch...
System-on-Chip (SoC) designs are increasingly becoming more complex. Efficient on-chip communication architectures are critical for achieving desired performance in these systems....
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...