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» Processor Architectures for Ontogenesis
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ISCA
2008
IEEE
132views Hardware» more  ISCA 2008»
15 years 11 months ago
Online Estimation of Architectural Vulnerability Factor for Soft Errors
As CMOS technology scales and more transistors are packed on to the same chip, soft error reliability has become an increasingly important design issue for processors. Prior resea...
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. ...
ISCA
2003
IEEE
169views Hardware» more  ISCA 2003»
15 years 9 months ago
Virtual Simple Architecture (VISA): Exceeding the Complexity Limit in Safe Real-Time Systems
Meeting deadlines is a key requirement in safe realtime systems. Worst-case execution times (WCET) of tasks are needed for safe planning. Contemporary worst-case timing analysis t...
Aravindh Anantaraman, Kiran Seth, Kaustubh Patil, ...
DATE
2008
IEEE
163views Hardware» more  DATE 2008»
15 years 11 months ago
Design flow for embedded FPGAs based on a flexible architecture template
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
B. Neumann, Thorsten von Sydow, Holger Blume, Tobi...
ASPLOS
2000
ACM
15 years 8 months ago
An Analysis of Operating System Behavior on a Simultaneous Multithreaded Architecture
This paper presents the first analysis of operating system execution on a simultaneous multithreaded (SMT) processor. While SMT has been studied extensively over the past 6 years,...
Joshua Redstone, Susan J. Eggers, Henry M. Levy
PDPTA
2003
15 years 5 months ago
An Interactive Tuning Support for Processor Allocation of Data-Driven Realtime Programs
This paper presents the effectiveness of an interactive support facility to tune processor allocation of data-driven realtime programs on CUE (Coordinating Users’ requirements an...
Yasuhiro Wabiko, Hiroaki Nishikawa