2700 search results - page 125 / 540 » Processor Architectures for Ontogenesis |
133
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CATA
2004
15 years 5 months ago
2004
This paper describes the instruction execution mechanism of Responsive Multithreaded (RMT) Processor for distributed real-time processing. The execution order of each thread is co...
169
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ANCS
2009
ACM
15 years 2 months ago
2009
ACM
In this paper, we propose an extensible Open-Architecture Services platform (OASis) for high-performance network processing. OASis embraces recent advances of open technologies, i...
152
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DAC
2009
ACM
16 years 5 months ago
2009
ACM
Heterogeneous multicore processors promise high execution
efficiency under diverse workloads, and program scheduling is
critical in exploiting this efficiency. This paper present...
125
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DATE
2008
IEEE
15 years 11 months ago
2008
IEEE
This paper presents a concurrent error detection technique targeted towards control logic in a processor with emphasis on low area overhead. Rather than detect all modeled transie...
141
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IPPS
2006
IEEE
15 years 10 months ago
2006
IEEE
By coupling a reconfigurable hardware to a standard processor, high levels of flexibility and adaptability are achieved. However, this approach requires modifications to the compi...