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» Processor Architectures for Ontogenesis
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AHS
2006
IEEE
142views Hardware» more  AHS 2006»
15 years 10 months ago
On-Chip Evolution Using a Soft Processor Core Applied to Image Recognition
To increase the flexibility of single-chip evolvable hardware systems, we explore possibilities of systems with the evolutionary algorithm implemented in software on an onchip pr...
Kyrre Glette, Jim Torresen, Moritoshi Yasunaga, Yo...
ISCAS
2006
IEEE
95views Hardware» more  ISCAS 2006»
15 years 10 months ago
Vertex cache of programmable geometry processor for mobile multimedia application
Vertex cache of programmable geometry processor The proposed architecture of vertex cache is divided into is proposed and implemented. The proposed vertex cache is pre-TnL vertex c...
Kyusik Chung, Chang-Hyo Yu, Lee-Sup Kim
CODES
2005
IEEE
15 years 10 months ago
Future processors: flexible and modular
The ability to continue increasing processor frequency and single thread performance is being severely limited by exponential increases in leakage and active power. To continue to...
Charlie Johnson, Jeff Welser
MICRO
2005
IEEE
140views Hardware» more  MICRO 2005»
15 years 10 months ago
Dynamic Helper Threaded Prefetching on the Sun UltraSPARC CMP Processor
Data prefetching via helper threading has been extensively investigated on Simultaneous MultiThreading (SMT) or Virtual Multi-Threading (VMT) architectures. Although reportedly la...
Jiwei Lu, Abhinav Das, Wei-Chung Hsu, Khoa Nguyen,...
ATS
2003
IEEE
131views Hardware» more  ATS 2003»
15 years 10 months ago
Software-Based Delay Fault Testing of Processor Cores
Software-based self-testing is a promising approach for the testing of processor cores which are embedded inside a System-on-a-Chip (SoC), as it can apply test vectors in function...
Virendra Singh, Michiko Inoue, Kewal K. Saluja, Hi...