253 search results - page 13 / 51 » Processor Models for Retargetable Tools |
DAC
2003
ACM
14 years 8 months ago
2003
ACM
This paper presents a novel instruction encoding generation technique for use in architecture exploration for application specific processors. The underlying exploration methodolo...
DATE
2004
IEEE
2004
IEEE
Automatic Verification of Safety and Liveness for XScale-Like Processor Models Using WEB Refinements
13 years 11 months ago
We show how to automatically verify that complex XScale-like pipelined machine models satisfy the same safety and liveness properties as their corresponding instruction set archit...
JSS
2006
13 years 7 months ago
2006
In this work, we propose a visual, custom-designed, event-driven interconnect simulation framework to evaluate the performance of off-chip multi-processor/memory communications ar...
IJHPCA
2010
13 years 5 months ago
2010
In this paper, we analyze restrictions of traditional communication performance models affecting the accuracy of analytical prediction of the execution time of collective communic...
CODES
2000
IEEE
13 years 12 months ago
2000
IEEE
The concept of system-on-a-chip is becoming increasingly popular for the integration of complex systems. New types of processor cores are now available that enable the designer to...