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118
Voted
DATE
2000
IEEE
15 years 7 months ago
2000
IEEE
This paper presents the system synthesis techniques available in S3 E2 S, a CAD environment for the specification, simulation, and synthesis of embedded electronic systems that ca...
159
Voted
CAMP
2005
IEEE
15 years 4 months ago
2005
IEEE
— We have simulated the implementation of 16-bit floating point instructions on a Pentium4 and PowerPC G4 and G5 to evaluate the performance impact of these instructions in embed...
109
Voted
MICRO
2007
IEEE
15 years 9 months ago
2007
IEEE
Modern chip multiprocessors (CMPs) are designed to exploit both instruction-level parallelism (ILP) within processors and thread-level parallelism (TLP) within and across processo...
136
Voted
ICS
2000
Tsinghua U.
15 years 6 months ago
2000
Tsinghua U.
The rapid advancements of networking technology have boosted potential bandwidth to the point that the cabling is no longer the bottleneck. Rather, the bottlenecks lie at the cros...
104
Voted
ISCAS
2006
IEEE
15 years 8 months ago
2006
IEEE
Abstract— In this article we present a novel design of a lowpower geometric mapping co-processor that can be used for high-performance graphics system. The processor can carry ou...