77 search results - page 5 / 16 » Promising Directions in Hardware Design Verification (invite... |
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
- We address the problem of implication of assertion graphs that occur in generalized symbolic trajectory evaluation (GSTE). GSTE has demonstrated its powerful capacity in formal v...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
Functional verification is widely acknowledged as a major bottleneck in microprocessor design. While early work on specification driven functional test program generation has prop...
ASYNC
1999
IEEE
13 years 11 months ago
1999
IEEE
This paper discusses the application of the timing analysis tool ATACS to the high performance, self-resetting and delayed-reset domino circuits being designed at IBM's Austi...
GLVLSI
2003
IEEE
14 years 22 days ago
2003
IEEE
The current trends in high performance integrated circuits are towards faster and more powerful circuits in the giga-hertz range and even further. As the more complex Integrated C...
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
Functional validation is a major bottleneck in the current SOC design methodology. While specification-based validation techniques have proposed several promising ideas, the time ...