1716 search results - page 130 / 344 » Proving Conditional Termination |
FMCAD
2004
Springer
14 years 2 months ago
2004
Springer
Most symbolic model checkers are based on either Binary Decision Diagrams (BDDs), which may grow exponentially large, or Satisfiability (SAT) solvers, whose time requirements rapi...
DATE
2010
IEEE
14 years 2 months ago
2010
IEEE
—Systems based on satellite localization are enabling new scenarios for road charging schemes by offering the possibility to charge drivers as a function of their road usage. An ...
IPPS
2002
IEEE
14 years 1 months ago
2002
IEEE
Tabling or memoing is a technique where one stores intermediate answers to a problem so that they can be reused in further calls. Tabling is of interest to logic programming becau...
ICCAD
2000
IEEE
14 years 1 months ago
2000
IEEE
–An FPGA switch box is said to be hyper-universal if it is routable for all possible surrounding multi-pin net topologies satisfying the routing resource constraints. It is desir...
ASPDAC
2000
ACM
14 years 1 months ago
2000
ACM
Multilevel Fiduccia-Mattheyses MLFM hypergraph partitioning 3, 22, 24 is a fundamental optimization in VLSI CAD physical design. The leading implementation, hMetis 23 , has sinc...