102 search results - page 15 / 21 » Pseudo-Exhaustive Testing of Sequential Circuits |
EVOW
1999
Springer
14 years 5 days ago
1999
Springer
A technique is proposed to reduce the peak power consumption of sequential circuits during test pattern application. High-speed computation intensive VLSI systems, as telecommunica...
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
| This paper reports the design of BIST structures for sequential machines. Testability of an FSM is limited due to the fact that some machine states remain unreachable and some ac...
DSD
2002
IEEE
14 years 25 days ago
2002
IEEE
We use a formal tool to extract Finite State Machines (FSM) based representations (lists of states and transitions) of sequential circuits described by flip-flops and gates. The...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
Circuit activity is a function of input patterns. When circuit activity changes abruptly, it can cause sudden drop or rise in power supply voltage. This change is known as power d...
DSD
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper presents an optimized fault diagnosing procedure applicable in Built-in Self-Test environments. Instead of the known approach based on a simple bisection of patterns in...