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FPL
2000
Springer
119views Hardware» more  FPL 2000»
14 years 12 days ago
A Self-Reconfigurable Gate Array Architecture
Abstract. This paper presents an innovative architecture for a reconfigurable device that allows single cycle context switching and single cycle random access to the unified on-chi...
Reetinder P. S. Sidhu, Sameer Wadhwa, Alessandro M...
ICRA
2008
IEEE
172views Robotics» more  ICRA 2008»
14 years 3 months ago
Robot navigation using a sparse distributed memory
— Despite all the progress that has been made in Robotics and Artificial Intelligence, traditional approaches seem unsuitable to build truly intelligent robots, exhibiting human...
Mendes Mendes, Manuel Marques Crisóstomo, A...
IJCNN
2006
IEEE
14 years 2 months ago
Studies on the Memory Capacity and Robustness of Chaotic Dynamic Neural Networks
- A dynamical neural model that is strongly biologically motivated is applied to learning and retrieving binary patterns. This neural network, known as Freeman’s Ksets, is traine...
Igor Beliaev, Robert Kozma
MHCI
2004
Springer
14 years 2 months ago
Memojog - An Interactive Memory Aid Incorporating Mobile Based Technologies
Memory problems are often associated with ageing and are among the most common effects of brain injury. Such problems can severely disrupt daily life and put huge strain on family ...
Kenny Morrison, Andrea Szymkowiak, Peter Gregor
DATE
2004
IEEE
159views Hardware» more  DATE 2004»
14 years 16 days ago
Compositional Memory Systems for Data Intensive Applications
To alleviate the system performance unpredictability of multitasking applications running on multiprocessor platforms with shared memory hierarchies we propose a task level set ba...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...