214 search results - page 23 / 43 » Quasi-Resonant Interconnects: A Low Power Design Methodology |
DAC
2003
ACM
14 years 8 months ago
2003
ACM
In this work, we report on an unprecedented design where digital, analog, and MEMS technologies are combined to realize a generalpurpose single-chip CMOS microsystem. The converge...
PPL
2008
13 years 7 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
ISCAS
1995
IEEE
13 years 11 months ago
1995
IEEE
— This paper introduces a simple analytical model for estimating standby and switching power dissipation in deep submicron CMOS digital circuits. The model is based on Berkeley S...
ISCAS
2003
IEEE
14 years 1 months ago
2003
IEEE
Abstract— The design of robust and area efficient power distribution networks for high speed, high complexity integrated circuits has become a challenging task. The integrity of...
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
As the scale of system integration continues to grow, the on-chip communication becomes the ultimate bottleneck of system performance and the primary determinant of system archite...