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» Quasi-Resonant Interconnects: A Low Power Design Methodology
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ET
2002
122views more  ET 2002»
13 years 7 months ago
Using At-Speed BIST to Test LVDS Serializer/Deserializer Function
LVDS is the acronym for Low-Voltage-DifferentialSignaling and is described in both the ANSI/TIA/EIA644 and IEEE 1596.3 standards. High performance yet Low Power and EMI have made ...
Magnus Eckersand, Fredrik Franzon, Ken Filliter
DATE
2009
IEEE
202views Hardware» more  DATE 2009»
14 years 2 months ago
Design as you see FIT: System-level soft error analysis of sequential circuits
Soft errors in combinational and sequential elements of digital circuits are an increasing concern as a result of technology scaling. Several techniques for gate and latch hardeni...
Daniel Holcomb, Wenchao Li, Sanjit A. Seshia
VRML
2000
ACM
14 years 9 days ago
3D behavioral model design for simulation and software engineering
Modeling is used to build structures that serve as surrogates for other objects. As children, we learn to model at a very young age. An object such as a small toy train teaches us...
Paul A. Fishwick
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
14 years 1 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
DAC
2008
ACM
14 years 9 months ago
Automatic package and board decoupling capacitor placement using genetic algorithms and M-FDM
In the design of complex power distribution networks (PDN) with multiple power islands, it is required that the PDN represents a low impedance as seen by the digital modules. This...
Krishna Bharath, Ege Engin, Madhavan Swaminathan