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DATE
2003
IEEE
101views Hardware» more  DATE 2003»
14 years 27 days ago
Energy Estimation for Extensible Processors
This paper presents an efficient methodology for estimating the energy consumption of application programs running on extensible processors. Extensible processors, which are incr...
Yunsi Fei, Srivaths Ravi, Anand Raghunathan, Niraj...
DATE
2008
IEEE
139views Hardware» more  DATE 2008»
14 years 2 months ago
Instruction Re-encoding Facilitating Dense Embedded Code
Reducing the code size of embedded applications is one of the important constraint in embedded system design. Code compression can provide substantial savings in terms of size. In...
Talal Bonny, Jörg Henkel
CODES
2007
IEEE
14 years 1 months ago
A code-generator generator for multi-output instructions
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
Hanno Scharwächter, Jonghee M. Youn, Rainer L...
OOPSLA
2010
Springer
13 years 6 months ago
Hera-JVM: a runtime system for heterogeneous multi-core architectures
Heterogeneous multi-core processors, such as the IBM Cell processor, can deliver high performance. However, these processors are notoriously difficult to program: different cores...
Ross McIlroy, Joe Sventek
LCTRTS
2004
Springer
14 years 29 days ago
Feedback driven instruction-set extension
Application specific instruction-set processors combine an efficient general purpose core with special purpose functionality that is tailored to a particular application domain. ...
Uwe Kastens, Dinh Khoi Le, Adrian Slowik, Michael ...