A Module-Rased design flow for digital ICs with hard and sofl modules is presented. Versions of the sofl modules are implemented with different areddelay characteristics. The vers...
With the emergence of the packet-switched networks as a possible system-on-chip (SoC) communication paradigm, the design of network-on-chips (NoC) has provided a challenge to the ...
This paper introduces the notion of a software decelerator, to be used in logic-centric system architectures. Functions are offloaded from logic to a processor, accepting a speed ...
Eric Keller, Gordon J. Brebner, Philip James-Roxby
Projects combining agile methods with CMMI1 are more successful in producing higher quality software that more effectively meets customer needs at a faster pace. Systematic Softwa...
In this paper, we study the data dissemination problem in time-constrained mobile computing systems (TCMCS) in which maximizing data currency (minimizing staleness) and meeting tr...
Hei-Wing Leung, Joe Chun-Hung Yuen, Kam-yiu Lam, E...