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FCCM
2006
IEEE
162views VLSI» more  FCCM 2006»
14 years 2 months ago
Power Visualization, Analysis, and Optimization Tools for FPGAs
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
Matthew French, Li Wang, Michael J. Wirthlin
ASPDAC
2007
ACM
95views Hardware» more  ASPDAC 2007»
14 years 19 days ago
Optimization of Arithmetic Datapaths with Finite Word-Length Operands
Abstract: This paper presents an approach to area optimization of arithmetic datapaths that perform polynomial computations over bit-vectors with finite widths. Examples of such de...
Sivaram Gopalakrishnan, Priyank Kalla, Florian Ene...
ISSS
2000
IEEE
127views Hardware» more  ISSS 2000»
14 years 1 months ago
Lower Bound Estimation for Low Power High-Level Synthesis
This paper addresses the problem of estimating lower bounds on the power consumption in scheduled data flow graphs with a fixed number of allocated resources prior to binding. T...
Lars Kruse, Eike Schmidt, Gerd Jochens, Ansgar Sta...
DAC
1996
ACM
14 years 24 days ago
POSE: Power Optimization and Synthesis Environment
Recent trends in the semiconductor industry have resulted in an increasing demand for low power circuits. POSE is a step in providing the EDA community and academia with an enviro...
Sasan Iman, Massoud Pedram
ICASSP
2009
IEEE
14 years 3 months ago
Estimating multiple transmitter locations from power measurements at multiple receivers
We consider the estimation of the locations of multiple transmitters based on received signal strength measurements at a network of randomly-placed receivers. We generalize the ex...
Jill K. Nelson, Jaime E. Almodovar, Maya R. Gupta,...