375 search results - page 3 / 75 » RTL power estimation and optimization |
ICCAD
1997
IEEE
13 years 11 months ago
1997
IEEE
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
DAC
1999
ACM
14 years 8 months ago
1999
ACM
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
We propose instruction-driven slicing, a new technique for annotating microprocessor descriptions at the Register Transfer Level (RTL) in order to achieve lower power dissipation....
DAC
1999
ACM
13 years 11 months ago
1999
ACM
This paper presents a design methodology, called common-case computation (CCC), and new design automation algorithms for optimizing power consumption or performance. The proposed ...