375 search results - page 6 / 75 » RTL power estimation and optimization |
DSD
2010
IEEE
13 years 5 months ago
2010
IEEE
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
TC
2008
13 years 7 months ago
2008
Abstract-- Preventing silicon chips from negative, even disastrous thermal hazards has become increasingly challenging these days; considering thermal effects early in the design c...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...
VLSID
2006
IEEE
14 years 1 months ago
2006
IEEE
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
ISLPED
1995
ACM
13 years 11 months ago
1995
ACM
We will present a power estimation technique for digital integrated circuits that operates at the register transfer level RTL . Such a high-level power estimation capability is r...