1304 search results - page 144 / 261 » RTOS Modeling for System Level Design |
132
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DATE
2005
IEEE
15 years 10 months ago
2005
IEEE
This paper explores methods for hardware acceleration of Hidden Markov Model (HMM) decoding for the detection of persons in still images. Our architecture exploits the inherent st...
121
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VAMOS
2008
Springer
15 years 5 months ago
2008
Springer
With current trends towards moving variability from hardware to software, and given the increasing desire to postpone design decisions as much as is economically feasible, managin...
152
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CODES
2006
IEEE
15 years 10 months ago
2006
IEEE
Virtual platform (ViP), or ESL (Electronic System Level) simulation model, is one of the most widely renowned system level design techniques. In this paper, we present a case stud...
156
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DEXA
2009
Springer
15 years 11 months ago
2009
Springer
Dimension hierarchies represent a substantial part of the data warehouse model. Indeed they allow decision makers to examine data at different levels of detail with On-Line Analyt...
150
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RSP
2003
IEEE
15 years 9 months ago
2003
IEEE
In this paper, an efficient design flow integrating Mentor Graphics Precesion C and HDL designer is derived. In this hybrid prototyping environment, efficient FPGA architectures a...