174 search results - page 27 / 35 » Reclocking for high-level synthesis |
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
Interconnectperformance does not scale well into deep submicron dimensions, and the rising number of analog effects erodes tal abstraction necessary for high levels of integration...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
We present a domain-specific approach to representing datapaths for hardware implementations of linear signal transform algorithms. We extend the tensor structure for describing l...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
Traditional RTL power optimization techniques commit transformations at the RTL based on the estimation of area, delay and power. However, because of inadequate power and delay in...
CMMR
2007
Springer
14 years 1 months ago
2007
Springer
This paper describes the design and implementation of a framework designed to aid collaborative development of a digital musical instrument mapping layer1 . The goal was to create ...