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FDL
2003
IEEE
14 years 2 months ago
2003
IEEE
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
DAC
1999
ACM
14 years 1 months ago
1999
ACM
This work presents an overview of the principles that underlie the speed-up achievable by dynamic hardware reconfiguration, proposes a more precise taxonomy for the execution mode...
FPL
2004
Springer
14 years 21 days ago
2004
Springer
Wavelet-based image compression has been suggested previously as a means to evaluate and compare both traditional and reconfigurable computers in terms of performance and resource ...
IESS
2007
Springer
14 years 3 months ago
2007
Springer
This work investigates the use of reconfigurable devices as computing platform for self-organizing embedded systems. Those usually consist of a set of distributed, autonomous node...
AHS
2007
IEEE
14 years 3 months ago
2007
IEEE
This paper reviews the current state of the art in highperformance reconfigurable computing (HPRC) from the perspective of EPCC, the high-performance computing centre at the Unive...