48 search results - page 1 / 10 » Reconfigurable Universal Adder |
ASAP
2007
IEEE
14 years 2 months ago
2007
IEEE
In this paper we present a novel adder/subtracter arithmetic unit that combines Binary and Binary Code Decimal (BCD) operations. The proposed unit uses effective addition/subtract...
ISCAS
2007
IEEE
14 years 5 months ago
2007
IEEE
—In this paper, we propose a high speed adder which is adopted for our reconfigurable architecture called FleXilicon. To support sub-word parallelism, the FleXilicon architecture...
ARC
2006
Springer
14 years 2 months ago
2006
Springer
This paper presents a reconfigurable hardware architecture for Public-key cryptosystems. By changing the connections of coarse grain Carry-Save Adders (CSAs), the datapath provides...
FPL
2010
Springer
13 years 9 months ago
2010
Springer
Integer addition is a universal building block, and applications such as quad-precision floating-point or elliptic curve cryptography now demand precisions well beyond 64 bits. Thi...
ETS
2006
IEEE
14 years 2 months ago
2006
IEEE
Online repair through reconfiguration is a particularly advantageous approach in the nanoelectronic environment since reconfigurability is naturally supported by the devices. Howe...