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» Reconfigurable trusted computing in hardware
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ISCAS
2005
IEEE
154views Hardware» more  ISCAS 2005»
14 years 3 months ago
An automated methodology for memory-conscious mapping of DSP applications on coarse-grain reconfigurable arrays
—This paper presents a memory-conscious mapping methodology of computational intensive applications on coarse-grain reconfigurable arrays. By exploiting the inherent abundant amo...
Michalis D. Galanis, Gregory Dimitroulakos, Consta...
FCCM
2003
IEEE
113views VLSI» more  FCCM 2003»
14 years 3 months ago
Issues and Approaches to Coarse-Grain Reconfigurable Architecture Development
Although domain-specialized FPGAs can offer significant area, speed and power improvements over conventional reconfigurable devices, there are several unique and unexplored design...
Kenneth Eguro, Scott Hauck
DATE
2010
IEEE
140views Hardware» more  DATE 2010»
14 years 2 months ago
Construction of dual mode components for reconfiguration aware high-level synthesis
High-level synthesis has recently started to gain industrial acceptance, due to the improved quality of results and the multi-objective optimizations offered. One optimization area...
George Economakos, Sotirios Xydis, Ioannis Koutras...
ERSA
2003
147views Hardware» more  ERSA 2003»
13 years 11 months ago
Towards Run-Time Re-Configurable Techniques for Real-Time Embedded Applications
Many embedded applications can benefit from the flexible custom computing opportunities that FPGA technology offers. The Run-Time Reconfiguration (RTR) of the FPGA as an applicati...
Timothy F. Oliver, Douglas L. Maskell
ISCA
2000
IEEE
118views Hardware» more  ISCA 2000»
14 years 1 months ago
Smart Memories: a modular reconfigurable architecture
Trends in VLSI technology scaling demand that future computing devices be narrowly focused to achieve high performance and high efficiency, yet also target the high volumes and lo...
Ken Mai, Tim Paaske, Nuwan Jayasena, Ron Ho, Willi...