563 search results - page 77 / 113 » Reconfigurable trusted computing in hardware |
PARELEC
2000
IEEE
13 years 12 months ago
2000
IEEE
The purpose of this paper is to demonstrate the implementation of an adaptable parallel architecture capable of system to task adaptation. The system implementation was based on X...
ISCA
2000
IEEE
13 years 12 months ago
2000
IEEE
Reconfigurable hardware has the potential for significant performance improvements by providing support for applicationāspecific operations. We report our experience with Chimae...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
A programmable parallel digital signal processor (DSP) core for embedded applications is presented which combines the concepts of single instruction stream over multiple data stre...
DATE
2003
IEEE
14 years 26 days ago
2003
IEEE
MorphoSys is a reconfigurable SIMD architecture. In this paper, a BSP-based ray tracing is gracefully mapped onto MorphoSys. The mapping highly exploits ray-tracing parallelism. A...
CHES
2000
Springer
13 years 12 months ago
2000
Springer
This work proposes a processor architecture for elliptic curves cryptosystems over fields GF(2m ). This is a scalable architecture in terms of area and speed that exploits the abil...