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» Reducing Compilation Time Overhead in Compiled Simulators
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IEEEPACT
2002
IEEE
14 years 26 days ago
Increasing and Detecting Memory Address Congruence
A static memory reference exhibits a unique property when its dynamic memory addresses are congruent with respect to some non-trivial modulus. Extraction of this congruence inform...
Samuel Larsen, Emmett Witchel, Saman P. Amarasingh...
DAC
2003
ACM
14 years 9 months ago
Compiler-generated communication for pipelined FPGA applications
In this paper, we describe a set of compiler analyses and an implementation that automatically map a sequential and un-annotated C program into a pipelined implementation, targete...
Heidi E. Ziegler, Mary W. Hall, Pedro C. Diniz
ADHOC
2008
122views more  ADHOC 2008»
13 years 8 months ago
Balancing computation and communication costs: The case for hybrid execution in sensor networks
Virtual machines (VM) are promising as system software in sensor networks. A major impediment to their widespread acceptance is their performance overhead. Compiling VM bytecode to...
Joel Koshy, Ingwar Wirjawan, Raju Pandey, Yann Ram...
VLSID
2002
IEEE
142views VLSI» more  VLSID 2002»
14 years 8 months ago
Address Code and Arithmetic Optimizations for Embedded Systems
An important class of problems used widely in both the embedded systems and scientific domains perform memory intensive computations on large data sets. These data sets get to be ...
J. Ramanujam, Satish Krishnamurthy, Jinpyo Hong, M...
DATE
2008
IEEE
106views Hardware» more  DATE 2008»
14 years 2 months ago
Source-Level Timing Annotation and Simulation for a Heterogeneous Multiprocessor
A generic and retargetable tool flow is presented that enables the export of timing data from software running on a cycle-accurate Virtual Prototype (VP) to a concurrent function...
Trevor Meyerowitz, Alberto L. Sangiovanni-Vincente...