Sciweavers

3702 search results - page 629 / 741
» Reducing Misclassification Costs
Sort
View
ISPD
2000
ACM
131views Hardware» more  ISPD 2000»
14 years 2 months ago
Multi-center congestion estimation and minimization during placement
As technology advances, more and more issues need to be considered in the placement stage, e.g., wirelength, congestion, timing, coupling. It is very hard to consider all of them ...
Maogang Wang, Xiaojian Yang, Kenneth Eguro, Majid ...
PDP
2010
IEEE
14 years 2 months ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...
EUROMICRO
1998
IEEE
14 years 2 months ago
Retransmission Scheme for MPEG Streams in Mission Critical Multimedia Applications
Since multimedia data are characterized by continuity and massive volume, compression techniques such as MPEG are used for efficient transmission. However, a transmission error oc...
Sugh-Hoon Lee, Sungyoung Lee
FCCM
1998
IEEE
149views VLSI» more  FCCM 1998»
14 years 2 months ago
Configuration Compression for the Xilinx XC6200 FPGA
One of the major overheads in reconfigurable computing is the time it takes to reconfigure the devices in the system. This overhead limits the speedups possible in this exciting n...
Scott Hauck, Zhiyuan Li, Eric J. Schwabe
FCCM
1998
IEEE
169views VLSI» more  FCCM 1998»
14 years 2 months ago
Scalable Network Based FPGA Accelerators for an Automatic Target Recognition Application
Abstract Image processing, specifically Automatic Target Recognition (ATR) in Synthetic Aperture Radar (SAR) imagery, is an application area that can require tremendous processing ...
Ruth Sivilotti, Young Cho, Wen-King Su, Danny Cohe...