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DATE
2006
IEEE
94views Hardware» more  DATE 2006»
14 years 1 months ago
Reuse-based test access and integrated test scheduling for network-on-chip
In this paper, we propose a new method for test access and test scheduling in NoC-based system. It relies on a progressive reuse of the network resources for transporting test dat...
Chunsheng Liu, Zach Link, Dhiraj K. Pradhan
QSIC
2005
IEEE
14 years 1 months ago
Fault-Based Testing of Database Application Programs with Conceptual Data Model
Database application programs typically contain program units that use SQL statements to manipulate records in database instances. Testing the correctness of data manipulation by ...
W. K. Chan, S. C. Cheung, T. H. Tse
DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
14 years 1 months ago
A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing
1-The increasing cost for System-on-Chip (SOC) testing is mainly due to the huge test data volumes that lead to long test application time and require large automatic test equipmen...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
ASPDAC
2007
ACM
140views Hardware» more  ASPDAC 2007»
13 years 11 months ago
An Architecture for Combined Test Data Compression and Abort-on-Fail Test
1 The low throughput at IC (Integrated Circuit) testing is mainly due to the increasing test data volume, which leads to high ATE (Automatic Test Equipment) memory requirements and...
Erik Larsson, Jon Persson
VTS
2002
IEEE
138views Hardware» more  VTS 2002»
14 years 13 days ago
Test Power Reduction through Minimization of Scan Chain Transitions
Parallel test application helps reduce the otherwise considerable test times in SOCs; yet its applicability is limited by average and peak power considerations. The typical test v...
Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailog...