221 search results - page 23 / 45 » Reducing the Interconnection Network Cost of Chip Multiproce... |
PPL
2008
13 years 7 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
TPDS
2008
13 years 7 months ago
2008
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On th...
ISCA
2008
IEEE
14 years 1 months ago
2008
IEEE
Current state-of-the-art on-chip networks provide efficiency, high throughput, and low latency for one-to-one (unicast) traffic. The presence of one-to-many (multicast) or one-t...
CAL
2008
13 years 6 months ago
2008
Packet-switched interconnect fabric, widely viewed as the de facto on-chip data communication standard in the many-core era, offers high throughput and excellent scalability. Howev...
FDL
2005
IEEE
14 years 1 months ago
2005
IEEE
Although Moore’s Law enables a huge number of components to be integrated into a single chip, design methods that will allow system architects to put the components together to ...