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» Reducing the Overhead of Dynamic Analysis
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LCPC
2005
Springer
14 years 1 months ago
Dynamic Compilation for Reducing Energy Consumption of I/O-Intensive Applications
Tera-scale high-performance computing has enabled scientists to tackle very large and computationally challenging scientific problems, making the advancement of scientific discov...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir, A...
ISLPED
1999
ACM
150views Hardware» more  ISLPED 1999»
13 years 11 months ago
Using dynamic cache management techniques to reduce energy in a high-performance processor
In this paper, we propose a technique that uses an additional mini cache, the L0-Cache, located between the instruction cache I-Cache and the CPU core. This mechanism can provid...
Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. P...
ISLPED
2005
ACM
108views Hardware» more  ISLPED 2005»
14 years 1 months ago
Replacing global wires with an on-chip network: a power analysis
This paper explores the power implications of replacing global chip wires with an on-chip network. We optimize network links by varying repeater spacing, link pipelining, and volt...
Seongmoo Heo, Krste Asanovic
MMAS
2011
Springer
13 years 2 months ago
Scalable Bayesian Reduced-Order Models for Simulating High-Dimensional Multiscale Dynamical Systems
While existing mathematical descriptions can accurately account for phenomena at microscopic scales (e.g. molecular dynamics), these are often high-dimensional, stochastic and thei...
Phaedon-Stelios Koutsourelakis, Elias Bilionis
ISCAS
2002
IEEE
154views Hardware» more  ISCAS 2002»
14 years 12 days ago
Architectural approaches to reduce leakage energy in caches
In this paper, we present two methods to reduce leakage energy by dynamically resizing the cache during program execution. The first method monitors the miss rate of the individua...
S. H. Tadas, C. Chakrabarti