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DATE
2002
IEEE
144views Hardware» more  DATE 2002»
14 years 19 days ago
Design Automation for Deepsubmicron: Present and Future
Advancing technology drives design technology and thus design automation EDA. How to model interconnect, how to handle degradation of signal integrity and increasing power densi...
Ralph H. J. M. Otten, Raul Camposano, Patrick Groe...
IEEEPACT
1999
IEEE
13 years 12 months ago
A Cost-Effective Clustered Architecture
In current superscalar processors, all floating-point resources are idle during the execution of integer programs. As previous works show, this problem can be alleviated if the fl...
Ramon Canal, Joan-Manuel Parcerisa, Antonio Gonz&a...
FCCM
2008
IEEE
177views VLSI» more  FCCM 2008»
14 years 2 months ago
Hardware Scripting in Gel
—Gel is a hardware description language that enables quick scripting of high level designs and can be easily extended to new design patterns. It is expression oriented and extrem...
Jonathan Bachrach, Dany Qumsiyeh, Mark Tobenkin
OTM
2007
Springer
14 years 1 months ago
Self-healing in Binomial Graph Networks
The number of processors embedded in high performance computing platforms is growing daily to solve larger and more complex problems. However, as the number of components increases...
Thara Angskun, George Bosilca, Jack Dongarra
DATE
2005
IEEE
110views Hardware» more  DATE 2005»
14 years 1 months ago
Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture
The increasing complexity and the short life cycles of embedded systems are pushing the current system-onchip designs towards a rapid increasing on the number of programmable proc...
Alexandre M. Amory, Marcelo Lubaszewski, Fernando ...