49 search results - page 8 / 10 » Reduction of Power Dissipation during Scan Testing by Test V... |
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Ultra low-power devices are being developed for embedded applications in bio-medical electronics, wireless sensor networks, environment monitoring and protection, etc. The testing...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
Many test data compression schemes are based on LFSR reseeding. A drawback of these schemes is that the unspecified bits are filled with random values resulting in a large number ...
TCAD
2002
13 years 7 months ago
2002
Test scheduling is an important problem in system-on-a-chip (SOC) test automation. Efficient test schedules minimize the overall system test application time, avoid test resource c...
TC
2008
13 years 7 months ago
2008
A low-transition test pattern generator, called the low-transition linear feedback shift register (LT-LFSR), is proposed to reduce the average and peak power of a circuit during te...
DATE
2003
IEEE
14 years 25 days ago
2003
IEEE
Reduction of both the test suite size and the download time of test vectors is important in today's System-On-a-Chip designs. In this paper, a method for compressing the scan...