1287 search results - page 134 / 258 » Reduction of Timed Hybrid Systems |
126
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ISCAS
2007
IEEE
15 years 10 months ago
2007
IEEE
—Systems on Chip (SoCs) congregate multiple modules and advanced interconnection schemes, such as networks on chip (NoCs). One relevant problem in SoC design is module mapping on...
148
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SAC
2009
ACM
15 years 11 months ago
2009
ACM
File systems make use of part of DRAM as the buffer cache to enhance its performance in traditional systems. In this paper, we consider the use of Non-Volatile RAM (NVRAM) as a w...
DATE
2007
IEEE
15 years 10 months ago
2007
IEEE
Controlling jitter on a picosecond (or smaller) time scale has become one of the most difficult challenges for testing multi-gigahertz systems. In this paper we present a novel me...
136
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ACL
2006
15 years 5 months ago
2006
This paper shows that a simple two-stage approach to handle non-local dependencies in Named Entity Recognition (NER) can outperform existing approaches that handle non-local depen...
116
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DATE
2006
IEEE
15 years 10 months ago
2006
IEEE
Discrete droplet digital microfluidics-based biochips face problems similar to that in other VLSI CAD systems, but with new constraints and interrelations. We focus on one such pr...