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» Reduction of Timed Hybrid Systems
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DATE
2010
IEEE
146views Hardware» more  DATE 2010»
14 years 3 months ago
Leveraging application-level requirements in the design of a NoC for a 4G SoC - a case study
—In this paper, we examine the design process of a Network on-Chip (NoC) for a high-end commercial System onChip (SoC) application. We present several design choices and focus on...
Rudy Beraha, Isask'har Walter, Israel Cidon, Avino...
IJCSA
2008
100views more  IJCSA 2008»
13 years 10 months ago
A Smart Architecture for Low-Level Image Computing
This paper presents a comparison relating two different vision system architectures. The first one involves a smart sensor including analog processors allowing on-chip image proce...
A. Elouardi, Samir Bouaziz, Antoine Dupret, Lionel...
PAAPP
2006
141views more  PAAPP 2006»
13 years 10 months ago
Algorithmic optimizations of a conjugate gradient solver on shared memory architectures
OpenMP is an architecture-independent language for programming in the shared memory model. OpenMP is designed to be simple and in terms of programming abstractions. Unfortunately,...
Henrik Löf, Jarmo Rantakokko
CDC
2010
IEEE
294views Control Systems» more  CDC 2010»
13 years 5 months ago
Adaptive self-triggered control over IEEE 802.15.4 networks
The communication protocol IEEE 802.15.4 is becoming pervasive for low power and low data rate wireless sensor networks (WSNs) applications, including control and automation. Never...
Ubaldo Tiberi, Carlo Fischione, Karl Henrik Johans...
ASPLOS
2010
ACM
14 years 3 months ago
Probabilistic job symbiosis modeling for SMT processor scheduling
Symbiotic job scheduling boosts simultaneous multithreading (SMT) processor performance by co-scheduling jobs that have ‘compatible’ demands on the processor’s shared resour...
Stijn Eyerman, Lieven Eeckhout