1017 search results - page 31 / 204 » Register computations on ordinals |
ASAP
2003
IEEE
14 years 29 days ago
2003
IEEE
The register file is a power-hungry device in modern architectures. Current research on compiler technology and computer architectures encourages the implementation of larger dev...
HIPC
2003
Springer
14 years 27 days ago
2003
Springer
In this paper, we present a novel technique to reduce dynamic and static power dissipation in the issue queue. The proposed scheme is based on delaying the dispatch of instructions...
IEEEPACT
2002
IEEE
14 years 18 days ago
2002
IEEE
In this paper, we describe an algorithm and implementation of locality optimizations for architectures with instruction sets such as Intel’s SSE and Motorola’s AltiVec that su...
ICDCS
2009
IEEE
14 years 4 months ago
2009
IEEE
Providing distributed processes with concurrent objects is a fundamental service that has to be offered by any distributed system. The classical shared read/write register is one ...
ICS
1999
Tsinghua U.
13 years 12 months ago
1999
Tsinghua U.
Instruction scheduling is an important compiler technique for exploiting more instruction-level parallelism (ILP) in high-performance microprocessors, and in this paper, we study ...