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CODES
2007
IEEE
14 years 1 months ago
A low power VLIW processor generation method by means of extracting non-redundant activation conditions
This paper proposes a low power VLIW processor generation method by automatically extracting non-redundant activation conditions of pipeline registers for clock gating. It is impo...
Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuc...
ISCAS
2006
IEEE
136views Hardware» more  ISCAS 2006»
14 years 1 months ago
An adaptable foveating vision chip
In this work we present an adaptable foveating vision biological eye has exceptionally good optomechanics. This chip. This chip has no physical foveation; all its pixels are in the...
Timothy G. Constandinou, Patrick Degenaar, Christo...
CASES
2006
ACM
14 years 1 months ago
Automated compile-time and run-time techniques to increase usable memory in MMU-less embedded systems
Random access memory (RAM) is tightly-constrained in many embedded systems. This is especially true for the least expensive, lowest-power embedded systems, such as sensor network ...
Lan S. Bai, Lei Yang, Robert P. Dick
CODES
2005
IEEE
14 years 1 months ago
Comparing two testbench methods for hierarchical functional verification of a bluetooth baseband adaptor
The continuous improvement on the design methodologies and processes has made possible the creation of huge and very complex digital systems. Design verification is one of the mai...
Edgar L. Romero, Marius Strum, Wang Jiang Chau
CF
2005
ACM
13 years 9 months ago
Dynamic loop pipelining in data-driven architectures
Data-driven array architectures seem to be important alternatives for coarse-grained reconfigurable computing platforms. Their use has provided performance improvements over micro...
João M. P. Cardoso