Multi-valued and universal binary neurons (MVN and UBN) are the neural processing elements with the complex-valued weights and high functionality. It is possible to implement an a...
The implementation of imaging arrays for System-On-a-Chip (SOC) is aided by using faulttolerant light sensors. Fault-tolerant redundancy in an Active Pixel Sensor (APS) is obtaine...
Sunjaya Djaja, Glenn H. Chapman, Desmond Y. H. Che...
—FPGAs are widely used for evaluating the error-floor performance of LDPC (low-density parity check) codes. We propose a scalable vector decoder for FPGA-based implementation of...
Xiaoheng Chen, Jingyu Kang, Shu Lin, Venkatesh Ake...
This paper presents a single chip implementation of a space-time algorithm for co-channel interference (CCI) and intersymbol interference (ISI) reduction in GSM/DCS systems. The t...
This paper describes how animat-based “food foraging” techniques may be applied to the design of low-level image processing algorithms. First, we show how we implemented the fo...
Enzo Bolis, Christian Zerbi, Pierre Collet, Jean L...