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FPL
2003
Springer
100views Hardware» more  FPL 2003»
14 years 2 months ago
Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...
Nazar A. Saqib, Francisco Rodríguez-Henr&ia...
FCCM
2005
IEEE
123views VLSI» more  FCCM 2005»
14 years 2 months ago
A Novel 2D Filter Design Methodology for Heterogeneous Devices
In many image processing applications, fast convolution of an image with a large 2D filter is required. Field Programable Gate Arrays (FPGAs) are often used to achieve this goal ...
Christos-Savvas Bouganis, George A. Constantinides...
ISCAS
2005
IEEE
167views Hardware» more  ISCAS 2005»
14 years 2 months ago
A novel 2D filter design methodology
Abstract— In many image processing applications, fast convolution of an image with a large 2D filter is required. Field Programable Gate Arrays (FPGAs) are often used to achieve...
Christos-Savvas Bouganis, George A. Constantinides...
ICIP
2008
IEEE
14 years 3 months ago
Fully reversible image rotation by 1-D filtering
In this work, we propose a new image rotation algorithm. The main feature of our approach is the symmetric reversibility, which means that when using the same algorithm for the co...
Laurent Condat, Dimitri Van De Ville
IJPP
2011
105views more  IJPP 2011»
13 years 3 months ago
Correlating Radio Astronomy Signals with Many-Core Hardware
A recent development in radio astronomy is to replace traditional dishes with many small antennas. The signals are combined to form one large, virtual telescope. The enormous data ...
Rob van Nieuwpoort, John W. Romein