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CODES
2004
IEEE
13 years 11 months ago
A novel deadlock avoidance algorithm and its hardware implementation
This paper proposes a novel Deadlock Avoidance Algorithm (DAA) and its hardware implementation, the Deadlock Avoidance Unit (DAU), as an Intellectual Property (IP) core that provi...
Jaehwan Lee, Vincent John Mooney III
VIS
2004
IEEE
186views Visualization» more  VIS 2004»
14 years 8 months ago
Hardware-Accelerated Adaptive EWA Volume Splatting
We present a hardware-accelerated adaptive EWA volume splatting algorithm. EWA splatting combines a Gaussian reconstruction kernel with a low-pass image filter for high image qual...
Wei Chen, Liu Ren, Matthias Zwicker, Hanspeter Pfi...
CIMAGING
2009
94views Hardware» more  CIMAGING 2009»
13 years 5 months ago
Iterative demosaicking accelerated: theory and fast noniterative implementations
Color image demosaicking is a key process in the digital imaging pipeline. In this paper, we present a rigorous treatment of a classical demosaicking algorithm based on alternatin...
Yue M. Lu, Mina Karzand, Martin Vetterli
CATA
2010
13 years 7 months ago
A Hardware Implementation of the Advanced Encryption Standard (AES) Algorithm using SystemVerilog
In this paper, a hardware implementation of the AES128 encryption algorithm is proposed. A unique feature of the proposed pipelined design is that the round keys, which are consum...
Bahram Hakhamaneshi, Behnam S. Arad
DATE
2006
IEEE
127views Hardware» more  DATE 2006»
14 years 1 months ago
ASIP design and synthesis for non linear filtering in image processing
This paper presents an Application Specific Instruction Set Processor (ASIP) design for the implementation of a class of nonlinear image processing algorithms, the Retinex-like fi...
Luca Fanucci, Michele Cassiano, Sergio Saponara, D...