74 search results - page 5 / 15 » Reordering Algorithm for Minimizing Test Power in VLSI Circu... |
VLSID
2003
IEEE
14 years 7 months ago
2003
IEEE
Functional decomposition is a process of splitting a complex circuit into smaller sub-circuits. This paper deals with the problem of determining the set of best free and bound var...
GLVLSI
2003
IEEE
14 years 19 days ago
2003
IEEE
The use of multiple supply voltages for energy and average power reduction is well researched and several works have appeared in the literature. However, in low power design using...
ICCAD
2009
IEEE
13 years 5 months ago
2009
IEEE
As VLSI technology reaches 45nm technology node, leakage power optimization has become a major design challenge. Threshold voltage (vt) assignment has been extensively studied, du...
EAAI
2007
13 years 7 months ago
2007
This paper presents a swarm intelligence based approach to optimally partition combinational CMOS circuits for pseudoexhaustive testing. The partitioning algorithm ensures reducti...
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...