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DATE
2010
IEEE
113views Hardware» more  DATE 2010»
14 years 3 months ago
PM-COSYN: PE and memory co-synthesis for MPSoCs
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...
Yi-Jung Chen, Chia-Lin Yang, Po-Han Wang
ICCD
2005
IEEE
159views Hardware» more  ICCD 2005»
14 years 3 months ago
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
CORR
2002
Springer
136views Education» more  CORR 2002»
13 years 9 months ago
Libra: An Economy driven Job Scheduling System for Clusters
Clusters of computers have emerged as mainstream parallel and distributed platforms for high-performance, highthroughput and high-availability computing. To enable effective resou...
Jahanzeb Sherwani, Nosheen Ali, Nausheen Lotia, Za...
HPDC
2010
IEEE
13 years 11 months ago
Cluster-wide context switch of virtualized jobs
Clusters are mostly used through Resources Management Systems (RMS) with a static allocation of resources for a bounded amount of time. Those approaches are known to be insufficie...
Fabien Hermenier, Adrien Lebre, Jean-Marc Menaud
ICC
2009
IEEE
151views Communications» more  ICC 2009»
14 years 4 months ago
Slow Adaptive OFDMA via Stochastic Programming
—Fueled by the promises of high spectral efficiency, adaptive OFDMA has attracted enormous research interests over the last decade. The significant capacity gain of adaptive OF...
Wei Liang (William) Li, Ying Jun (Angela) Zhang, M...