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» Reuse Technique in Hardware Design
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FCCM
2000
IEEE
122views VLSI» more  FCCM 2000»
14 years 2 months ago
Evaluating Hardware Compilation Techniques
Hardware compilation techniques which use highlevel programming languages to describe and synthesize hardware are gaining popularity. They are especially useful for reconfigurable...
Markus Weinhardt, Wayne Luk
MICRO
2008
IEEE
118views Hardware» more  MICRO 2008»
14 years 4 months ago
Notary: Hardware techniques to enhance signatures
Hardware signatures have been recently proposed as an efficient mechanism to detect conflicts amongst concurrently running transactions in transactional memory systems (e.g., Bulk...
Luke Yen, Stark C. Draper, Mark D. Hill
EUROGP
2008
Springer
128views Optimization» more  EUROGP 2008»
13 years 11 months ago
Hardware Accelerators for Cartesian Genetic Programming
A new class of FPGA-based accelerators is presented for Cartesian Genetic Programming (CGP). The accelerators contain a genetic engine which is reused in all applications. Candidat...
Zdenek Vasícek, Lukás Sekanina
ITC
2003
IEEE
124views Hardware» more  ITC 2003»
14 years 3 months ago
Power-aware NoC Reuse on the Testing of Core-based Systems
This work discusses the impact of power consumption on the test time of core-based systems, when an available on-chip network is reused as test access mechanism. A previously prop...
Érika F. Cota, Luigi Carro, Flávio R...
DATE
2005
IEEE
125views Hardware» more  DATE 2005»
14 years 3 months ago
Lightweight Multitasking Support for Embedded Systems using the Phantom Serializing Compiler
Embedded software continues to play an ever increasing role in the design of complex embedded applications. In part, the elevel of abstraction provided by a high-level programming...
André C. Nácul, Tony Givargis